With true single cycle instructions the internal clock is identical to the oscillator clock. There is no internal divider to produce the different clock phases! Most of the micros in the 8 - 16-bit market are dividing the clock with a ratio of 1:4 to 1:12, which is a bottleneck for the speed. For a given task the AVR will run 4 to 12 times faster, or the power consumption can be reduced by a factor 4-12 with the same clock frequency. In a CMOS technology, the power consumption of digital logic is proportional to the frequency. Figure 1 shows the extreme increase of MIPS (Million Instructions Per Second) with true single cycle (1:1 ratio) compared to a clock division ratio of 1:4 and 1:12.