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VHDL Tutorial |
Enumeration types in VHDL | ||
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Introduction |
. Enumeration Types
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Contact : webmaster@freehost7com Often when writing models of hardware at an abstract level, it is useful to use a set of names for the encoded values of some signals, rather than committing to a bit-level encoding straightaway. VHDL enumeration types allow us to do this. In order to de- fine an enumeration type, we need to use a type declaration. The syntax rule is
type_declaration ⇐ type identifier is type_definition ;
A type declaration allows us to introduce a new type, distinct from other types. One form of type definition is an enumeration type definition. We will see other forms later. The syntax rule for enumeration type definitions is
enumeration_type_definition ⇐ ( ( identifier I character_literal ) { , … } )
This simply lists all of the values in the type. Each value may be either an iden- tifier or a character literal. An example including only identifiers is
type alu_function is (disable, pass, add, subtract, multiply, divide);
An example including just character literals is
type octal_digit is ('0', '1', '2', '3', '4', '5', '6', '7');
Given the above two type declarations, we could declare variables:
variable alu_op : alu_function; variable last_digit : octal_digit := '0';
and make assignments to them:
alu_op := subtract; last_digit := '7';
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