VHDL Tutorial

Numbers in VHDL
Fundamental concepts
Modelling concepts
Elements of behaviour
Elements of structure
Analysis elaboration
Lexical elements

Characters and strings 
Syntax descriptions
Constants and variables
Scalar type
Integer types
Floating point types
Time type
Enumeration types
Character types
Boolean type 
Bits type
Standard logic
Sequential statements
Case statements
Loop and exit statements
Assertion statements
Array types & array operations
Architecture bodies
Entity declarations
Behavioral descriptions 
Wait statements
Delta delays
Process statements
Conditional signal assignment 
Selected signal assigment
Structural descriptions
Library and library clauses
Procedure parameters
Signal parameters
Default values
Unconstrained array parameter
Package declarations and bodies
Subprograms in package
Use clauses
Resolved signals and subtypes
Resolved signals and ports
Parameterizing behavior
Parameterizing structure




There are two forms of numbers that can be written in VHDL code: integer literals and real literals.  An integer literal simply represents a whole number and consists of digits without  a  decimal  point.   Real  literals,  on  the  other  hand,  can  represent  fractional numbers.   They  always  include  a  decimal  point,  which  is  preceded  by  at  least  one digit and followed by at least one digit.  Some examples of decimal integer literals are


23   0    146    


Some examples of real literals are


23.1    0.0    3.14159


Both integer and real literals can also use exponential notation, in which the num- ber is followed by the letter E or e, and an exponent value.  This indicates a power

of 10 by which the number is multiplied.   For integer literals, the exponent must not be negative, whereas for real literals, it may be either positive or negative.   Some ex- amples of integer literals using exponential notation are


46E5    1E+12    19e00


Some examples of real literals using exponential notation are


1.234E09    98.6E+21    34.0e08



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