| VHDLTutorial | Built in data types | |||||||||||||
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Introduction to VHDL History of VHDL Naming Conventions Libraries and packages Entities Entity Declaration Entity Example Ports Architectures Architecture declaration Architecture example Configurations Signals Signal representation Multivalued logic representation Built in data types Synthesis vs simulation Logical operators Assignment statements Process statements D Flip flop example code Finite state machine(FSM) Finite state machine example Combinational circuit example code Quad 2 input MUX example Seven segment display controller 8 Bit register 32 bit counter
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VHDL supports a rich set of built-in data types as well as user-defined data types
• Built-in data types work well for simulation but not so well for synthesis
• Built-in data types are suitable for use inside an architecture but should not be used for external pins
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